As it is known, power stages operating in switching mode are quickly replacing the so-called “linear” systems by virtue of their higher efficiency. The most common cases of electronic devices operating based on “switching” techniques are voltage adjusters and audio power amplifiers.
The need is increasingly felt by users, to have switching devices having reduced dimensions with regards to the dissipating devices and the output inductances. This involves the manufacturers producing devices that reduce the dissipated power and increase the switching frequency.
For the characteristics of the switching devices, these requirements are conflicting, since, as the switching frequency increases, the losses due to the switching also increase, thus the efficiency of the same device is reduced.
Another point to be considered relates to the electromagnetic radiation of the device, which generally increases as the switching speed increases, i.e., as the switching frequency increases.
Particularly, also with reference to FIG. 1A, in which an output block of these electronic power devices is shown, a first electronic switch MH and a second electronic switch ML are shown. Each electronic switch has a first conduction terminal MHd, MLd, and a second conduction terminal MHs, MLs and a command or control terminal MHg, MLg, in which the first conduction terminal MHd of the first electronic switch MH is connected with a supply terminal Vdd, and the second conduction terminal MLs of the second electronic switch ML is connected with a ground terminal GND. The corresponding command terminals MHg, MLg of the first and second electronic switches MH, ML are connected to corresponding pilot drivers DRV1, DRV2.
It is further noticed that the second conduction terminal MHs of the first electronic switch MH is connected to the first conduction terminal MLd of the second electronic switch ML, and both are connected to an output terminal Vout.
Such switches MH, MI are turned on and off alternately by the corresponding drivers DRV1, DRV2 connecting the output Vout to the supply terminal Vdd or the ground terminal GND.
Particularly, in the example of FIG. 1A, the two electronic switches MH and ML are implemented, for example, by two power MOS transistors (or power MOS) with an “N” type channel, so as to implement the scheme of a half-bridge output stage.
The typical waveforms of such output stages are illustrated in FIG. 1B in the case of an incoming output current Iout, a null output current Iout, and an exiting output current Iout, with such currents having a direction as illustrated in FIG. 1B.
As it is noticed, the power dissipation, for each type of current Iout, occurs both by conduction (zones A, B, and C) and by switching (zones D and E).
It is worth pointing out that the conduction losses (zones A, B, and C) are due to the voltage drop at the ends of the two power MOS transistors multiplied by the current Iout.
On the other hand, the switching losses (zones D and E) are given by the product of the voltage at the ends of the power MOS transistors for the current flowing therein during the transition into an output voltage from GND to Vdd.
While neglecting the “dead zones”, where both power MOS transistors are turned off, although there are losses due to the current flowing in the intrinsic diode that there is between the drain terminal and the source terminal, the conduction losses (zones A, B, and C) are independent from the switching frequency, since they only depend on the Rds(on) of the power MOS transistors.
Instead, the switching losses (zones D and E) are directly proportional to the switching frequency, and decrease as the rising and descending time of the output waveform decreases.
The parasitic elements that are associated with the package may be one of the main obstacles to reaching high efficiencies at high frequencies. For example, in the traditional packages, an example of which is illustrated in FIG. 2, comprising leads and bonding wires, these are characterized by parasitic resistances R1, R2 and inductances L1, L2 of the order of tens of milliohms and about 5 nH, respectively.
These values are such that both the conduction losses (caused by the total series resistance Rds(on) of the half bridge illustrated in FIG. 1A) and the switching losses may not be particularly reduced.
The presence of the inductance L1, L2 forces not particularly high variations of the current in the switches of the half bridge with respect to time (i.e., in the formula di/dt).
This depends on the fact that the voltage at the ends of the bonding inductance is related to the variation upon time of the current by the formula: VL=L*di/dt, where L is the value of the parasitic bonding inductance and VL is the voltage at the ends of the same bonding inductance caused by the current variation, the voltage that would be developed at the ends of the parasitic inductances, thus at the ends of the power transistors acting as switches of the half bridge. Such voltage at the ends of the bonding inductance VL may exceed the specifications for the component in the case of a high (di/dt).
Furthermore, these peaks may also cause malfunctions of other parts of the device.
The consequences of the structures that serve to decrease the factor di/dt are rise and descent times of the output waveform such that the switching losses at frequencies above some hundred kHz become the prevailing ones.
In order to minimize the power dissipated by switching, the so-called “resonating”, “almost resonating” or “soft switching” switching systems exist, in which, by a further resonating LC cell besides the one that is generally present in the output filter, the transistors MH and ML of the half bridges are turned on only when the voltage at the ends thereof or the current flowing therein is null.
Generally, the circuits are more complex than those of a simple bridge, since they require additional inductances and, sometimes, converters. Furthermore, with the switching circuits of a resonating type, it is complex to have good fidelity of the PWM command in a power output.
Recently, various packages were proposed, that minimize the parasitic elements of the traditional packages. Particularly, for power devices, the so-called packages having a low parasitic inductance are indicated, particularly as regards the leads or bonding wires, such as, for example, a WLP package, which is the acronym for Wafer-Level package, or a CSP package, which is the acronym for Chip-Scale package.
Particularly, the WLP package, also with reference to FIG. 3, provides that the connection of the device to the printed board takes place through protuberances or balls of a conductor material that are grown more or less directly on the chip. Then the chip is in turn mounted flipped (flip chip), thus completely eliminating the bonding wires.
This scheme, besides reducing the parasitic resistance to values below one milliohm, reduces the parasitic inductance by a factor of about 100, from 5 nH to less than 50 pH.
The drawback of this WLP package is related to the difficulty or impossibility of dissipating the power through a true dissipater, at least in low cost systems.
In this case the heatsink is the printed circuit board on which the chip is attached. It is estimated that a WLP with 200 balls on a 2s2p circuit with standard dimensions jdec have a Rthj-a of about 20 degrees/W.
However, it has to be pointed out that, in devices with supply voltage and output currents exceeding a preset value, also considering a complete zeroing of the parasitics, the power dissipated by switching and the current peaks in standard devices of the half-bridge type, although they are driven so as to have very fast switching fronts, do not allow dissipating the power only by exploiting the printed board. Furthermore, they may make it very difficult to limit the electromagnetic emissions.
For example, consider the circuit of FIG. 3, wherein the circuit illustrated in FIG. 1A is implemented on a WLP-type package. Assume that the current is incoming, with the direction indicated in such FIG. 3 and the power MOS ML is driven with a driver (or generator) with an output resistance Rd2 equal to 1 Ohm. As per the power MOS MH, only the recirculation diode dMH, being the short circuited terminal command KHg, is used.
In this configuration, the switching losses are due to only the load of the transistor ML.
The current output by the supply generator Vdd as a function of the output current, from 0.1 A to 6.1 A is illustrated in FIG. 4. As can be noticed, the critical point is upon activating the transistor ML.
In this step, the output current flows in the recirculation diode dMH of transistor MH. In order to make it so that the Vout returns to zero, the transistor ML first discharges the charge built up in this recirculation diode dMH, which then, throughout this period, is similar to a short at the supply voltage Vdd. Again in this period, on the transistor ML the supply voltage Vdd falls, plus the direct voltage of the diode dMH. Since the current levels reached in this step may reach values of about 70 A (FIG. 4, point M), both the very high power dissipation and the problems that the current spike may cause with regards to the electromagnetic radiation are clear.